Exemplary embodiments relate to a semiconductor memory device and a method of operating the same.
There is a growing demand for semiconductor memory devices which can electrically program and erase data and can retain the data even without the supply of power. In order to produce high-capacity memory devices capable of storing a large amount of data, techniques for the high integration of memory cells are being developed. For example, a NAND type memory device in which a plurality of memory cells are connected in series to form a cell string, a plurality of the cell strings forms a memory block, and a plurality of the memory blocks forms a memory cell array has been proposed.
The semiconductor memory device may employ a repair technique for using redundancy cell strings instead of cell strings including defective memory cells among the cell strings of a memory block.
However, the semiconductor memory device may include the limited number of redundancy cell strings. Therefore, if the number of defective cell strings is greater than the number of redundancy cell strings in one memory block, the memory block may not be used properly and may be discarded as an unusable bad block.